Secure device state apparatus and method and lifecycle management
US10872154B2 · kind B2 · utility
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25References
20Claims
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Key dates
| Filing date | Jan 30, 2019 |
| Grant date | Dec 22, 2020 |
| Priority date | — |
| Expiry date | Jun 26, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip device include device state fuses that may be used to configure various device states and corresponding security levels for the semiconductor chip as it transitions from wafer manufacturing to provisioned device. The device states and security levels prevent the semiconductor chip from being accessed and exploited, for example, during manufacturing testing. A secure boot flow process for a semiconductor chip over its lifecycle is also disclosed. The secure boot flow may start at the wafer manufacturing stage and continue on through the insertion of keys and firmware.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.