Multilayer ceramic capacitor including dielectric layers having improved reliability
US10872726B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2018 |
| Grant date | Dec 22, 2020 |
| Priority date | — |
| Expiry date | Oct 24, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01G4/224
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A multilayer ceramic capacitor includes: a ceramic body including dielectric layers and first internal electrodes and second internal electrodes disposed to face each other with one of the dielectric layers interposed therebetween; and first and second external electrodes disposed on external surfaces of the ceramic body and electrically connected to the first and second internal electrodes, respectively. The dielectric layer includes dielectric grains, a grain boundary is present between at least two dielectric grains of the dielectric grains, and a Si/Ti mole ratio in the grain boundary satisfies 15% to 40%.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.