Thin film transistor having channel regions, array substrate, manufacturing method thereof and display device comprising the same
US10872984B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 19, 2018 |
| Grant date | Dec 22, 2020 |
| Priority date | — |
| Expiry date | Sep 19, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/126
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A thin-film transistor (TFT), an array substrate, a manufacturing method thereof and a display device are provided. The TFT includes an active layer, a gate electrode, a first source/drain electrode and a second source/drain electrode. The active layer includes a first channel region and a second channel region, a first source/drain area between the first channel region and the second channel region, and a second source/drain area opposite to the first source/drain area through the first channel region or the second channel region. The gate electrode includes a first gate electrode and a second gate electrode which are respectively overlapped with the first channel region and the second channel region. The first source/drain electrode and the second source/drain electrode are respectively electrically connected with the first source/drain area and the second source/drain area of the active layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.