Track and hold circuits for high speed and interleaved ADCs
US10873336B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 19, 2020 |
| Grant date | Dec 22, 2020 |
| Priority date | — |
| Expiry date | Feb 19, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03H7/38
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Improved track and hold (T/H) circuits can help analog-to-digital converters (ADCs) achieve higher performance and lower power consumption. The improved T/H circuits can drive high speed and interleaved ADCs, and the design of the circuits enable additive and multiplicative pseudo-random dither signals to be injected in the T/H circuits. The dither signals can be used to calibrate (e.g., linearize) the T/H circuits and the ADC(s). In addition, the dither signal can be used to dither any remaining non-linearity, and to calibrate offset/gain mismatches in interleaved ADCs. The T/H circuit design also can integrate an amplifier in the T/H circuit, which can be used to improve the signal-to-noise ratio (SNR) of the ADC or to act as a variable gain amplifier (VGA) in front of the ADC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.