Data frame error recovery for multi-node systems
US10873429B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 28, 2019 |
| Grant date | Dec 22, 2020 |
| Priority date | — |
| Expiry date | Mar 28, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/40
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method of performing data frame error recovery is disclosed. A data packet is received and tested to determine whether the data packet includes one or more bit errors. The data packet is compared with one or more data packets stored in a recovery buffer to identify a duplicate of the data packet when the data packet includes one or more bit errors. One or more bits affected by the one or more bit errors are identified based on a comparison between the data packet and the duplicate of the data packet. Different combinations of bit values for the one or more bits are determined, and the data packet is tested with the different combinations to identify a correct combination of bit values for the one or more bits. The data packet is recovered based on the correct combination of bit values for the one or more bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.