Near zero power charging to digital converter, sensors and sensing methods
US10877439B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 22, 2018 |
| Grant date | Dec 29, 2020 |
| Priority date | — |
| Expiry date | May 22, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02J7/007
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A charging to digital converter sensor in a CMOS integrated circuit includes a sensor responding to a sensed property, a converter that converts the sensed property into a charging time, a digitizer for digitizing the charging time, and digital feedback to reset the converter to restart the charging time. Preferred methods for sensing match the rising time of the first ramp voltage to a second ramp voltage generated by a reference current mirrored from a common current generator via the tuning of DAC capacitors driven by an LSB-first SAR logic feedback; or match rising times of the first and second ramp voltages to a reference voltage and providing a digital signal that translates the relationship of the first ramp voltage and the reference voltage to a digital quantification of the sensed property.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.