Transparently attached flash memory security
US10877673B2 · kind B2 · utility
4Cited by
4References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2018 |
| Grant date | Dec 29, 2020 |
| Priority date | — |
| Expiry date | Dec 21, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes an interface circuit and a monitor circuit communicatively coupled to the interface circuit. The monitor circuit is configured to identify a command issued to a memory communicatively coupled to the monitor circuit through the interface circuit, determine whether the command is authorized, and, based on a determination that the command is not authorized, cancel the command.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.