Systems, methods, and apparatuses for tile diagonal
US10877756B2 · kind B2 · utility
15Cited by
51References
20Claims
0Family size
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Key dates
| Filing date | Jul 1, 2017 |
| Grant date | Dec 29, 2020 |
| Priority date | — |
| Expiry date | Jul 1, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/455
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments detailed herein relate to matrix operations. In particular, tile diagonal support is described. For example, a processor is detailed having decode circuitry to decode an instruction having fields for an opcode, a source operand identifier, and a destination matrix operand identifier; and execution circuitry to execute the decoded instruction to write the identified source operand to each element along a main diagonal of the identified destination matrix operand.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.