Method, apparatus, and system for prefetching exclusive cache coherence state for store instructions
US10877895B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 27, 2018 |
| Grant date | Dec 29, 2020 |
| Priority date | — |
| Expiry date | Aug 27, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method, apparatus, and system for prefetching exclusive cache coherence state for store instructions is disclosed. An apparatus may comprise a cache and a gather buffer coupled to the cache. The gather buffer may be configured to store a plurality of cache lines, each cache line of the plurality of cache lines associated with a store instruction. The gather buffer may be further configured to determine whether a first cache line associated with a first store instruction should be allocated in the cache. If the first cache line associated with the first store instruction is to be allocated in the cache, the gather buffer is configured to issue a pre-write request to acquire exclusive cache coherency state to the first cache line associated with the first store instruction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.