Logic device for detecting faults
US10878132B2 · kind B2 · utility
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3References
21Claims
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Key dates
| Filing date | Mar 14, 2018 |
| Grant date | Dec 29, 2020 |
| Priority date | — |
| Expiry date | Oct 4, 2038 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY04S40/20
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A device can be used for detecting faults. A shift register is suitable for shifting, in tempo with a clock, a binary signal alternating between two logic levels, in successive cells of the shift register. A first logic circuit is suitable for comparing values contained in at least one pair of cells of the register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.