Bump structures for high density flip chip interconnection
US10879204B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2020 |
| Grant date | Dec 29, 2020 |
| Priority date | — |
| Expiry date | Apr 2, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/12043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming bump structures for interconnecting components includes applying an insulating layer over a device substrate, coating the insulating layer with a dielectric material layer, forming a pattern with photolithography on the dielectric material layer, etching the dielectric material layer to transfer the pattern to the insulating layer, etching the insulating layer to form pockets in the insulating layer following the pattern, applying photolithography to and etching the dielectric material layer to reduce overhang of the dielectric material layer relative to the insulating layer, removing material from top and side walls of the pockets in the insulating layer, and depositing electrically conductive bump material in the pattern so a respective bump is formed in each pocket.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.