Power converter with phase error correction
US10884043B1 · kind B1 · utility
2Cited by
4References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 19, 2019 |
| Grant date | Jan 5, 2021 |
| Priority date | — |
| Expiry date | Jul 19, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K4/90
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A power converter circuit included in a computer system may charge and discharge a switch node coupled to a regulated power supply node via an inductor. The power converter circuit may generate a reference clock signal using a system clock signal and a voltage level of the switch node. The reference clock signal may be used to initiate a charge cycle, whose duration may be based on generated ramp signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.