Autonomously controlling a buffer of a processor
US10884476B2 · kind B2 · utility
0Cited by
16References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 1, 2019 |
| Grant date | Jan 5, 2021 |
| Priority date | — |
| Expiry date | Mar 1, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/105
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment, an apparatus includes an input/output (I/O) buffer to couple a logic unit to another device coupled via a pad, and a logic coupled to the I/O buffer to detect a value on the pad and to control the I/O buffer to provide the value to the pad, responsive to entry into an architectural state. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.