Strideshift instruction for transposing bits inside vector register
US10884750B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2017 |
| Grant date | Jan 5, 2021 |
| Priority date | — |
| Expiry date | Feb 28, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3552
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor includes a decode circuit to decode an instruction into a decoded instruction and an execution circuit to execute the decoded instruction to access a first bit of a first input vector located at a bit position indicated by an element of a second input vector, stride over bits of the first input vector using a stride to access bits of the first input vector that are located at a strided bit position with respect to the first bit of the first input vector, and store the first bit of the first input vector and the bits of the first input vector that are located at a strided bit position with respect to the first bit of the first input vector as consecutive bits in a destination vector.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.