Offloading data movement for packet processing in a network interface controller
US10884960B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2019 |
| Grant date | Jan 5, 2021 |
| Priority date | — |
| Expiry date | Apr 19, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0026
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, a direct memory access (DMA) controller within a host device obtains a packet to be processed by the host device, where the host device comprises a host processor, a network interface controller (NIC), and a co-processor of the NIC, and where the co-processor is configured to perform one or more specific packet processing operations. The DMA controller may then detect a DMA descriptor of the packet, and can determine, according to the DMA descriptor, how the packet is to be moved for processing within the host device. As such, the DMA controller may then move the packet, based on the determining, to one of either a host main memory, a NIC memory, or a co-processor memory of the host device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.