Test circuit, array substrate, display panel, and display device
US10886301B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 2018 |
| Grant date | Jan 5, 2021 |
| Priority date | — |
| Expiry date | Oct 27, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An array substrate, a display panel, and a display device. The array substrate has a display area and a non-display area surrounding the display area. The array substrate further includes a plurality of signal lines located in the display area, a plurality of test signal lines and a plurality of test control transistors located in the non-display area and respectively corresponding to the plurality of signal lines. Each of the signal lines is connected to a respective one of the test signal lines by a respective one of the test control transistors. The plurality of test control transistors each have a channel width-to-length ratio between 10 and 200.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.