Array substrate and display panel comprising fracture opening for blocking carrier transportation between adjacent sub-pixels
US10886492B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 2019 |
| Grant date | Jan 5, 2021 |
| Priority date | — |
| Expiry date | May 1, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K2102/351
Abstract
An array substrate and a manufacturing method thereof, and a display panel are disclosed. The array substrate includes a base substrate, comprising a plurality of sub-pixel regions and inter-sub-pixel regions between adjacent sub-pixel regions; and a first organic functional layer on the base substrate. At least a portion of the first organic functional layer is in the plurality of sub-pixel regions; and the first organic functional layer includes at least one fracture opening, the at least one fracture opening is configured to block a transportation of the carriers between adjacent sub-pixel regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.