Method and apparatus for a one bit per symbol timing recovery phase detector
US10887077B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 15, 2019 |
| Grant date | Jan 5, 2021 |
| Priority date | — |
| Expiry date | Jul 15, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W52/0235
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Embodiments are disclosed for timing recovery used in conjunction with a phase detector embedded in a receiver of a communication system. An example method includes receiving, via a receiver of a communication system, an input signal. The input signal encodes a plurality of bits in a number of amplitude levels. The method further includes using an analog to digital converter to generate a sampled signal based on the input signal. The method further includes using a first interpolation filter to filter the sampled signal. The method further includes using a second interpolation filter to filter the sampled signal. The method further includes using a first non-linear device to process an output of the first interpolation filter. The method further includes using a second non-linear device to process an output of the second interpolation filter. The method further includes performing a mathematical operation on an output of the first non-linear device with an output of the second non-linear device to generate phase information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.