Page-based memory operation with hardware initiated secure storage key update
US10891232B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2019 |
| Grant date | Jan 12, 2021 |
| Priority date | — |
| Expiry date | Mar 29, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/622
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods and systems for secure storage protection for memory operations are provided. Aspects include providing a drawer comprising a plurality of clusters, each of the plurality of clusters comprising a plurality of processors, wherein each of the plurality of clusters share a first cache memory, providing a cluster shared cache integrated circuit to manage a second cache memory shared among the plurality of clusters, providing a system memory associated with each of the plurality of clusters, receiving, by a memory controller, a memory operation request from one of the plurality of processors, wherein the memory operation includes a store command, and wherein the memory controller is configured to perform the memory operation and atomically write a secure storage key for the memory operation with the store command of the memory operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.