Techniques for testing electrically configurable digital displays, and associated display architecture
US10891882B1 · kind B1 · utility
2Cited by
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28Claims
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Key dates
| Filing date | Mar 2, 2018 |
| Grant date | Jan 12, 2021 |
| Priority date | — |
| Expiry date | Feb 23, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0275
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present techniques are capable of identifying and pinpointing defective microdrivers and/or row/column drivers either before or after any μLEDs have been placed on the display. Using the architectures described herein, test data may be delivered in a parallel fashion to the drivers from support circuitry, such as a timing controller and/or a main board, and outputs based on the test data may be similarly delivered back to the support circuitry do determine which drivers are defective. This yields access to the output of every microdriver and row drier, thus enabling the identification of specific defective elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.