Logic circuitry
US10894423B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 3, 2019 |
| Grant date | Jan 19, 2021 |
| Priority date | — |
| Expiry date | Jul 3, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N1/00
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A logic circuit for a replaceable print component is configured to, in response to a plurality of commands including a first command specifying the new I2C communications address and a first calibration parameter, a second command specifying the new I2C communications address and a second calibration parameter, a third command specifying the new I2C communications address and a class parameter, and/or fourth commands specifying the new I2C communications address and sub-class parameters, and at least one read request, generate count values in a count value range defined by a highest and lowest count value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.