Array substrate, manufacturing method, display panel and display device
US10895774B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 22, 2018 |
| Grant date | Jan 19, 2021 |
| Priority date | — |
| Expiry date | May 22, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG02F2202/104
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present disclosure discloses an array substrate, including a first active layer formed on a substrate; a first gate insulating layer on the substrate and the first active layer; a first gate electrode and a second gate electrode formed on the first gate insulating layer; a second gate insulating layer on the first gate insulating layer and the first and second gate electrodes; a second active layer and second source and drain electrodes formed on the second gate insulating layer, the second source and drain electrodes being electrically connected to the second active layer; an interlayer insulating layer on the second gate insulating layer, the second active layer and the second source and drain electrodes; and first source and drain electrodes formed on the interlayer insulating layer, the first source and drain electrodes being electrically connected to the first active layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.