Semiconductor package
US10896881B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2020 |
| Grant date | Jan 19, 2021 |
| Priority date | — |
| Expiry date | Mar 16, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a frame having a first through-hole, a semiconductor chip disposed on the first through-hole an having an active surface on which a connection pad is disposed and an inactive surface, a first encapsulant covering at least a portion of the inactive surface and a side surface of the semiconductor chip, a connection structure disposed on the active surface of the semiconductor chip and including a redistribution layer electrically connected to the connection pad of the semiconductor chip and a ground pattern layer, a side surface cover layer covering at least an outer side surface of the frame, and a metal layer disposed on the upper surface of the first encapsulant and extending downwardly along the side surface cover layer to cover the side surface cover layer and a portion of the side surface of the connection structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.