Apparatuses and methods involving adjustable circuit-stress test conditions for stressing regional circuits

US10901023B2 · kind B2 · utility

Assignee

• NXP B.V. · NL

Inventors

• Jan-Peter Schat · Hamburg, DE
• Abdellatif Zanati · Hamburg, DE

Key dates

• Filing date: Aug 9, 2018
• Grant date: Jan 26, 2021
• Expiry date: Mar 15, 2039

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/3004
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

An example method includes stressing, under different circuit-stress test conditions, a plurality of different types of regional circuits susceptible to time dependent dielectric breakdown (TDDB), and in response, monitoring for levels of reliability failure associated with the plurality of different types of regional circuits. The method includes storing a set of stress-test data based on each of the levels of reliability failure, the set of stress-test data being stored within the integrated circuit to indicate reliability-threshold test data specific to the integrated circuit. Within the integrated circuit, an on-chip monitoring circuit indicates operational conditions of suspect reliability associated with dielectric breakdown of at least one of the plurality of different types of regional circuits. And, the method further includes, during operation of the integrated circuit, adjusting at least one of the different circuit-stress test conditions based on the indicated operational conditions of suspect reliability.