Error detection for processing elements redundantly processing a same processing workload
US10901865B2 · kind B2 · utility
1Cited by
1References
19Claims
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Key dates
| Filing date | Apr 3, 2019 |
| Grant date | Jan 26, 2021 |
| Priority date | — |
| Expiry date | Jul 29, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/85
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus has two or more processing elements to redundantly process a same processing workload; and divergence detection circuitry to detect divergence between the plurality of processing elements. When a correctable error is detected by error detection circuitry of an erroneous processing element, the erroneous processing element signals detection of the correctable error to another processing element, to control the other processing element to delay processing to maintain a predetermined time offset between the erroneous processing element and the other processing element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.