Private verification for FPGA bitstreams
US10902132B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 2017 |
| Grant date | Jan 26, 2021 |
| Priority date | — |
| Expiry date | Jun 16, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/2107
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus, method and system are disclosed which may be used for assessing the trustworthiness of a particular proprietary microelectronics device design representation in a manner that will maintain its confidentiality and, among other things, thwart attempts at unauthorized access, misappropriation and reverse engineering of the confidential proprietary aspects contained in the design representation and/or its bit stream design implementation format. The disclosed method includes performing a process for assessing/verifying a particular microelectronics device design representation and then providing some indication of the trustworthiness of that representation. An example utility/tool which implements the disclosed method is described that is particularly useful for trust assessment and verification of FPGA designs. The described utility/tool may be instantiated on a semiconductor device or implemented as a software utility executable on a mobile computing device or other information processing system, apparatus or network.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.