Array substrate gate driving unit and apparatus thereof, driving method and display apparatus
US10902810B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 28, 2017 |
| Grant date | Jan 26, 2021 |
| Priority date | — |
| Expiry date | Jun 5, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G3/3696
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to an array substrate gate driving unit and an apparatus thereof, a driving method and a display apparatus. The array substrate gate driving unit includes: an input circuit, connected with an input signal terminal and a pull-up node PU; a pull-down circuit, connected with a first voltage signal terminal and the pull-up node PU; a pull-down control circuit, connected with the pull-down circuit via a pull-down node PD; an output circuit, connected with a clock signal terminal CLK, a second voltage signal terminal and a control circuit; a reset circuit, connected with a reset signal terminal Reset, the first voltage signal terminal and the pull-up node PU; and the control circuit, connected with the pull-up node PU and the output circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.