Shift register, GOA circuit, display device and driving method
US10902811B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Oct 10, 2017 |
| Grant date | Jan 26, 2021 |
| Priority date | — |
| Expiry date | Oct 5, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/061
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure provides a shift register, a GOA circuit, a display device, and a driving method. A shift register is provided which comprises: at least one input sub-circuit for charging a pull-up node; at least one output sub-circuit for outputting a respective clock signal; first reset sub-circuit(s) for pulling the potential of the respective signal output terminal down to a reference potential; a first noise reduction sub-circuit for performing noise reduction on the pull-up node through a signal input from the reference potential terminal; a second noise reduction sub-circuit for performing noise reduction on the pull-down node through a signal input from the reference potential terminal; and a second reset sub-circuit for controlling the potential of the pull-down node under control of a signal input from the reset clock signal input terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.