Shift register, gate driving circuit and driving method, and display apparatus
US10902930B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 25, 2018 |
| Grant date | Jan 26, 2021 |
| Priority date | — |
| Expiry date | Oct 25, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/02
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register includes a first input sub-circuit, a pull-up control sub-circuit, and a pull-down control sub-circuit. The first input sub-circuit is configured to transmit a voltage from the first signal terminal to the first node under control of the first voltage terminal. The pull-up control sub-circuit is configured to be in a turn-on or turn-off state under control of the first node. The pull-down control sub-circuit is configured to transmit a voltage from the third voltage terminal to the pull-down node under control of the first node, transmit the voltage from the third voltage terminal to the pull-down node under control of the signal output terminal, and transmit a voltage from the first clock signal terminal to the pull-down node under control of the first clock signal terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.