Patent · US Active

Semiconductor device and fabrication method thereof

US10903201B2 · kind B2 · utility

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7Claims
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Key dates

Filing dateDec 28, 2018
Grant dateJan 26, 2021
Priority date
Expiry dateDec 28, 2038

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D84/907
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

The present disclosure provides a semiconductor device and a manufacturing method thereof. The semiconductor device includes: a semiconductor substrate including a high-frequency-block group and a low-power-block group; high-frequency-type logic standard cells located on the high-frequency-block group, and having a high-frequency-type cell height, a high-frequency-type operating frequency, and a high-frequency-type power; low-power-type logic standard cells located on the low-power-block group, and having a low-power-type cell height, a low-power-type operating frequency, and a low-power-type power. The high-frequency-type cell height is higher than the low-power-type cell height. The high-frequency-type operating frequency is greater than the low-power-type operating frequency. The high-frequency-type power is greater than the low-power-type power. The high-frequency-type logic standard cells include high-frequency-type fins, and the low-power-type logic standard cells include low-power-type fins. An effective height of the high-frequency-type fins is greater than an effective height of the low-power-type fins.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.