Semiconductor memory device and method of fabricating the same
US10903216B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2019 |
| Grant date | Jan 26, 2021 |
| Priority date | — |
| Expiry date | Jul 24, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed are a semiconductor memory device and a method of fabricating the same. The device may include a first substrate comprising a cell array region, a first interlayer insulating layer covering the first substrate, a second substrate disposed on the first interlayer insulating layer, the second substrate including a core region electrically connected to the cell array region, a first adhesive insulating layer interposed between the first interlayer insulating layer and the second substrate, and contact plugs penetrating the second substrate, the first adhesive insulating layer, and the first interlayer insulating layer and electrically connecting the cell array region with the core region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.