Three-dimensional semiconductor memory devices and methods of fabricating the same
US10903327B2 · kind B2 · utility
2Cited by
4References
19Claims
0Family size
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Key dates
| Filing date | Apr 27, 2020 |
| Grant date | Jan 26, 2021 |
| Priority date | — |
| Expiry date | Apr 27, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Three-dimensional semiconductor memory devices and methods of fabricating the same. The three-dimensional semiconductor devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor patterns and the electrode structure, the first pattern vertically extending to cross the electrodes and the second pattern horizontally extending to cross the semiconductor patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.