Direct memory access for graphics processing unit packet processing
US10909655B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 2020 |
| Grant date | Feb 2, 2021 |
| Priority date | — |
| Expiry date | May 25, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T2200/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Devices for coordinating or establishing a direct memory access for a network interface card to a graphics processing unit, and for a network interface card to access a graphics processing unit via a direct memory access are disclosed. For example, a central processing unit may request a graphics processing unit to allocate a memory buffer of the graphics processing unit for a direct memory access by a network interface card and receive from the graphics processing unit a first confirmation of an allocation of the memory buffer. The central processing unit may further transmit to the network interface card a first notification of the allocation of the memory buffer of the graphics processing unit, poll the network interface card to determine when a packet is received by the network interface card, and transmit a second notification to the graphics processing unit that the packet is written to the memory buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.