Memory system and nonvolatile memory
US10910068B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 26, 2019 |
| Grant date | Feb 2, 2021 |
| Priority date | — |
| Expiry date | Dec 26, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a nonvolatile memory and a controller. The nonvolatile memory includes memory cells at intersection locations of stacked word lines and a memory pillar passing through the word lines in a stacking direction, the word lines including a first group of word lines stacked above a second group of word lines. The controller reads data of a first memory cell in a first read mode and reads data of a second memory cell in a second read mode. The first memory cell is, and the second memory cell is not, at an intersection location of a word line that is in a boundary area of the first and second groups of word lines and the memory pillar. The boundary area is adjacent to a location of the memory pillar where a width of the memory pillar discontinuously changes along the stacking direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.