Display device and method of manufacturing the same
US10910477B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 4, 2020 |
| Grant date | Feb 2, 2021 |
| Priority date | — |
| Expiry date | Feb 4, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
A display device includes a first insulation layer on a first gate electrode, an active pattern on the first insulation layer and including an NMOS area and a PMOS area, the PMOS area overlapping the first gate electrode, a second insulation layer on the active pattern. The active pattern includes an NMOS area and a PMOS area, with the PMOS area overlapping the first gate electrode. In addition, a second gate electrode is on the second insulation layer and overlaps the NMOS area. An active-protecting pattern is in the same layer as the second gate electrode and passes through the second insulation layer to contact the PMOS area. A third insulation layer is on the active-protecting pattern and the second gate electrode. A data metal electrode passes through the third insulation layer and contacts the active-protecting pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.