System and method for demodulation of resolver outputs
US10911061B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 23, 2018 |
| Grant date | Feb 2, 2021 |
| Priority date | — |
| Expiry date | Apr 25, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01C21/18
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
Demodulation circuitry includes an input terminal configured to be coupled to an analog-to-digital converter (ADC) and configured to receive a plurality of ADC outputs. The plurality of ADC outputs are generated based on resolver outputs. The demodulation circuitry also includes a rectifier configured to rectify the plurality of ADC outputs. Rectifying the plurality of ADC outputs preserves a phase of the plurality of ADC outputs. The demodulation circuitry includes amplitude determination circuitry configured to determine, based on the rectified plurality of ADC outputs, demodulated amplitude values corresponding to the resolver outputs. The demodulation circuitry further includes angle computation circuitry configured to generate position outputs based on the demodulated amplitude values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.