Parallel computing system
US10911522B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 14, 2018 |
| Grant date | Feb 2, 2021 |
| Priority date | — |
| Expiry date | Nov 14, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L67/568
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A parallel computing system is provided, including input ports, a first switching network, a computing array, a second switching network and output ports. The first switching network is receiving input data from the input ports, sequencing the input data according to different computing modes of the computing array and outputting sequenced input data; the computing array is performing parallel computation on the sequenced input data and outputting intermediate data; and the second switching network is sequencing the intermediate data according to different output modes and outputting sequenced intermediate data through the output ports. The present disclosure applies the switching networks to the parallel computing system and performs any required sequencing on the input or output data according to the different computing modes and output modes to complete various arithmetic operations through the computing array after the input data are input into the computing array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.