Digital in-pixel read-out integrated circuit including residue-to-counter calibration
US10911705B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 31, 2019 |
| Grant date | Feb 2, 2021 |
| Priority date | — |
| Expiry date | May 31, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/78
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A digital pixel circuit includes a unit cell configured to accumulate an electrical charge during a frame. The electrical charge is proportional to a light intensity of a light signal that is detected at a location in a field of view of the unit cell. An image processing unit is in signal communication with the unit cell. The image processing unit is configured to determine a total charge based on a plurality of accumulated charges over a plurality of sequential frames, and to determine an indication of the light intensity of light at the location based on the total charge. The unit cell is configured to operate in a first mode to accumulate the electrical charges over the plurality of sequential frames, and a second mode to perform a calibration operation that calibrates the unit cell based on the electrical charge accumulated during a single frame among the plurality of frames.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.