Variable latency request arbitration
US10915359B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2018 |
| Grant date | Feb 9, 2021 |
| Priority date | — |
| Expiry date | Feb 12, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1615
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique for scheduling processing tasks having different latencies is provided. The technique involves identifying one or more available requests in a request queue, where each request queue corresponds to a different latency. A request arbiter examines a shift register to determine whether there is an available slot for the one or more requests. A slot is available for a request if there is a slot that is a number of slots from the end of the shift register equal to the number of cycles the request takes to complete processing in a corresponding processing pipeline. If a slot is available, the request is scheduled for execution and the slot is marked as being occupied. If a slot is not available, the request is not scheduled for execution on the current cycle. On transitioning to a new cycle, the shift register is shifted towards its end and the technique repeats.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.