Patent · US Active

Automatic redesign of digital circuits

US10915684B2 · kind B2 · utility

0Cited by

4References

20Claims

0Family size

Assignee

Palo Alto Research Center Incorporated · US

Inventors

Alexander Feldman · San Jose, US
Ion Matei · Sunnyvale, US
Johan de Kleer · Los Altos, US

Key dates

Filing date	Oct 15, 2018
Grant date	Feb 9, 2021
Priority date	—
Expiry date	Oct 18, 2038

Classification

Technology area (CPC G)Physics
CPC primaryG06F2119/20
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

The following relates generally to design and redesign of digital circuits. In one disclosed embodiment, a circuit is annotated by identifying at least one possible error location according to an error library; the at least one possible error location is localized; and the circuit is redesigned based on the localized at least one possible error location.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.