Reduction and/or mitigation of crosstalk in quantum bit gates
US10915831B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2019 |
| Grant date | Feb 9, 2021 |
| Priority date | — |
| Expiry date | Dec 18, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04B14/02
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
Techniques facilitating reduction and/or mitigation of crosstalk in quantum bit gates of a quantum computing circuit are provided. A system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a signal generation component that implements a control sequence that comprises a single pulse type for a first quantum bit and at least a second quantum bit of a quantum circuit. The computer-executable components can also comprise a coordination component that synchronizes a first pulse of a first channel of the first quantum bit and at least a second pulse of at least a second channel of the second quantum bit. The coordination component can simultaneously apply the first pulse to the first quantum bit and at least the second pulse to at least the second quantum bit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.