Shift register and method for driving the same, gate driving circuit, and display device
US10916213B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jul 12, 2018 |
| Grant date | Feb 9, 2021 |
| Priority date | — |
| Expiry date | Jul 12, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/023
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register includes first, second and third output sub-circuits, first and second pull-down sub-circuits, and a selection sub-circuit. The first output sub-circuit is coupled to a pull-up node, a first output terminal, and a first clock signal terminal. The second output sub-circuit is coupled to the first clock signal terminal, the selection sub-circuit, and a second output terminal. The third output sub-circuit is coupled to a second clock signal terminal, the selection sub-circuit, and the second output terminal. The selection sub-circuit is coupled to the second and third output sub-circuits, the pull-up node, and a gating signal terminal. The first pull-down sub-circuit is coupled to a first pull-down node, the first output terminal, a second voltage terminal, and the pull-up node. The second pull-down sub-circuit is coupled to the second output terminal, a first voltage terminal, and the first pull-down node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.