Shift register unit, driving method thereof, gate drive circuit, and display device
US10916320B2 · kind B2 · utility
3Cited by
0References
20Claims
0Family size
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Key dates
| Filing date | May 30, 2018 |
| Grant date | Feb 9, 2021 |
| Priority date | — |
| Expiry date | Aug 1, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register unit includes a first output control circuit, a first output circuit, a second output control circuit, a second output circuit, a reset circuit, and a node set circuit. The node set circuit is configured to periodically transfer a first voltage having an inactive level to a first node within the shift register unit during being enabled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.