Display device, display panel and manufacturing method thereof
US10916615B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 23, 2020 |
| Grant date | Feb 9, 2021 |
| Priority date | — |
| Expiry date | Mar 23, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K2102/351
Abstract
A display panel includes a substrate; a conductive layer disposed on the substrate; a gate insulating layer disposed on the conductive layer; a gate layer disposed on the gate insulating layer, wherein the gate layer has a thickness larger than a thickness of the conductive layer; a groove extending toward the substrate and punching through the gate layer, orthographic projections of the groove and the conductive layer on the substrate overlapping, and gate layers separated on two sides of the groove being connected to the conductive layer; an interlayer dielectric layer disposed on a side of the gate layer away from the substrate and covering the conductive layer and filling the groove; and an auxiliary electrode layer disposed on the interlayer dielectric layer, wherein the orthographic projections of the auxiliary electrode layer and the gate layer on substrate do not overlap, and the orthographic projections of the auxiliary electrode layer and the groove on the substrate overlap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.