Patent · US Active

Data processing apparatus and terminal

US10917361B2 · kind B2 · utility

0Cited by

0References

20Claims

0Family size

Assignee

Huawei Technologies Co., Ltd. · CN

Inventor

Wan Lam · Lo Wu, CN

Key dates

Filing date	Feb 28, 2018
Grant date	Feb 9, 2021
Priority date	—
Expiry date	Feb 28, 2038

Classification

Technology area (CPC H)Electricity
CPC primaryH04L49/40
WIPO fieldDigital communication
WIPO sectorElectrical engineering

Abstract

A data processing apparatus includes N apparatus input ends, an input switch, K buffer areas, a first output switch, a second output switch, and M apparatus output ends. N input ends of the input switch are coupled to the N apparatus input ends, and K output ends of the input switch correspond to the K buffer areas. K1 input ends of the first output switch correspond to K1 buffer areas in the K buffer areas, and M output ends of the first output switch are coupled to the M apparatus output ends. K2 input ends of the second output switch correspond to K2 buffer areas in the K buffer areas except the K1 buffer areas, and M output ends of the second output switch are coupled to the M apparatus output ends.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.