Shift register unit, gate drive circuit, and display device
US10923007B2 · kind B2 · utility
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0References
20Claims
0Family size
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Key dates
| Filing date | Jul 8, 2019 |
| Grant date | Feb 16, 2021 |
| Priority date | — |
| Expiry date | Jul 8, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0286
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure relates to the field of display technologies and provides a shift register unit. The shift register unit includes an input circuit, a pull-up circuit, an output circuit, an auxiliary circuit, a pull-down circuit, a first storage capacitor, and a second storage capacitor. The auxiliary circuit is coupled to a first clock signal terminal, a second clock signal terminal, an input terminal and a first output terminal. The second storage capacitor is coupled between a first node and a pull-up node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.