Display panel and electroluminescence display using the same
US10923036B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 1, 2017 |
| Grant date | Feb 16, 2021 |
| Priority date | — |
| Expiry date | May 1, 2038 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2354/00
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display panel and an electroluminescence display using the same are discussed. The display panel includes pixels in which data lines and gate lines are crossed and which are arranged in a matrix form, and a gate driver configured to supply a gate pulse to the gate lines. Each pixel circuit of the pixels includes one or more n-type transistors and two or more p-type transistors. A gate driver of the display panel includes a first gate driving circuit configured to supply a first gate signal to an n-type transistor of the pixel circuit using a plurality of n-type transistors, a second gate driving circuit configured to supply a second gate signal to one of the p-type transistors of the pixel circuit using a plurality of p-type transistors, and a third gate driving circuit configured to supply a third gate signal to the other one of the p-type transistors of the pixel circuit using a plurality of n-type transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.