Indium bump liftoff process on micro-machined silicon substrates
US10923446B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2019 |
| Grant date | Feb 16, 2021 |
| Priority date | — |
| Expiry date | Sep 11, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/01049
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A metallic etching process includes applying an anti-reflection coating over a metallic superstrate, applying a dry film photoresist over the anti-reflection coating, removing exposed portions of the dry film photoresist exposing a portion of the anti-reflection coating, etching the exposed portions of the anti-reflection coating exposing portions of the metal superstrate, etching portions of the metallic superstrate not covered by the dry film photoresist, and removing the dry film photoresist and the anti-reflection coating leaving portions of the metallic superstrate. An indium bump liftoff process includes applying a positive photoresist, forming a liftoff mask by applying a dry film photoresist over the positive photoresist, removing exposed portions of the liftoff mask to expose a portion of a substrate, depositing an indium film over the exposed portion of the substrate and remaining portions of the liftoff mask, and removing remaining portions of the liftoff mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.