Sequential circuit with timing event detection and a method of detecting timing events
US10924098B2 · kind B2 · utility
1Cited by
5References
4Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 18, 2017 |
| Grant date | Feb 16, 2021 |
| Priority date | — |
| Expiry date | Apr 18, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/003
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A sequential circuit with timing event detection is disclosed. The sequential circuit has an input that is asserted to the output during the second clock phase of a two phase clock signal. A timing event detector is coupled to the sequential element input to assert a timing event signal if a transition occurs at the sequential element input during the second clock phase but not to assert during the first clock phase.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.