Dielectric coating for crosstalk reduction
US10925152B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 2018 |
| Grant date | Feb 16, 2021 |
| Priority date | — |
| Expiry date | Oct 3, 2038 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/09872
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Apparatuses, systems and methods associated with dielectric coatings for printed circuit boards are disclosed herein. In embodiments, a printed circuit board (PCB) includes a substrate, microstrip conductors located on a surface of the substrate, a solder mask covering the surface of the substrate and the microstrip conductors, and a dielectric coating located on the solder mask, the dielectric coating on an opposite side of the solder mask from the microstrip conductors, wherein a thickness of the dielectric coating is selected to cause a ratio of capacitive coupling to self capacitance to be approximately equal to a ratio of inductive coupling to self inductance for each microstrip conductor of the microstrip conductors, where the thickness may be determined based on a specific methodology including simulations. Other embodiments may be described and/or claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.